Comments by "John Doh" (@johndoh5182) on "ASML's High-NA and Hyper-NA EUV: An Update" video.

  1. So, Nvidia developed a system that greatly reduces the amount of time it takes to produce a mask, so I don't know if a larger mask would be as big of a deal anymore. And since I didn't see this in the first part of the video, producing a mask takes a large server bank many days to produce so there is REAL cost to make these things. I don't understand the cost for the material, but for the server utilization it's a lot of power consumption. In terms of chipmaking and fabrication, no decision from 2013 should be considered gospel. I know this technology takes time to roll out, but at the same time new technology develops with it.
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  2. The cost of a high-NA machine is not prohibitive. Consider that these machines are not making simple ICs. These are making ICs that go into graphics or compute devices with 2 - 6 billion transistors/IC. If the IC doesn't have this, there's really not a lot of reason to make the IC using a 2nm process node. They could use N5 as a more economical node or N7, and this is for ICs with many millions of transistors. We're at the point to where moving a circuit to smaller process nodes REALLY has to be evaluated. Even with nodes like N7 and N5, these are making high end compute ICs with a few billion transistors/IC, or die. So, moving to high-NA for one allows N3 to be make more efficiently and cost less to make. That's a REALLY good thing because N3 hasn't even hit the high end, high transistor count market yet. Right now that's being made with N5 or N4, and N4 is a variant on N5. Maybe it would be more beneficial to make even these nodes with high-NA but the yield rates are plenty good right now from at least TSMC making N5 and N4. N3 is still kind of the unknown right now because I believe for TSMC that's going into risk production for a couple companies, and then a little later in this first year run will even be Intel. Apple will of course be a first customer with this node and I don't know who a 2nd will be other than Intel but once again, I don't think Intel is coming in at the beginning of N3 production. AMD will be on N4 and N3 next year, so I think their production run should start around the end of this year. Apple ICs should be in production even now for N3. So, the reason why the cost isn't prohibitive is they'll be making ICs that companies charge a lot for, based of cost/sq. mm. It won't drive up the cost of say, AMD CPUs because you're also reducing the size of the IC, and I'm talking about AMD not Apple because in the world of server AMD is significant and Apple isn't. Apple is mostly making consumer products. AMD makes consumer and business products, especially high end server products, just like Nvidia does. So, through all of that what I didn't talk about is how today's CPUs are being made. AMD has already moved to using multiple chip design for making CPUs to run servers and home computer. They can already take advantage of the more expensive process nodes like N5 to make CPU cores, and they can take advantage of lower cost process nodes to make the parts of the CPU such as the I/O (input/output) for the CPU to communicate with everything outside of the CPU, such as a graphics card, memory, a storage disk, etc..... Intel is about to be doing the same thing. So they can deal with higher cost/wafer because they get a lot more ICs out of each wafer, and they can push certain functionality out of the core chiplets so they use as little as possible of the most expensive, smaller node processes like N3 or N2 when it comes out.
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