Hearted Youtube comments on Asianometry (@Asianometry) channel.
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Another cool thing about FPGAs is their interconnects. Decades ago, we didn't worry too much about how a signal got from A to B, because wire wrapped and FPGAs implemented them for us. Then came along higher speed circuitry. Electromagnetic fields coupled signals in one wire to another wire, especially if those wires ran parallel to each other. We didn't worry about what was inside the FPGAs, because they seemed not to have this cross coupling problem. Finally we decided to characterize this phenomenon to wire interconnects on the boards. We came up with something the RF engineers used - micro strips and strip lines. Most of you will recognize them, because boards are constructed of layers. These layers are GND, then interconnects, then PWR, then interconnects, and so forth. This solved the glitch problem. CPLD and FPGA manufacturers figured this out much earlier, probably because they came from the ASIC world.
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