Comments by "M Simon" (@msimon6808) on "A Brief History of Semiconductor Packaging" video.

  1. Yes. As you point out it is a difficult problem. It is handled by controlling the rates of temperature rise/fall. Peak temperature and dwell time at peak temperature. Moisture content must also be controlled.
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  2. DIP da DIP de DIP.
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  3. I never called them Vy ahs. It was always Vee ahs. BTW DIP pin spacing is on exact multiples of 0.100" (or 2.54 mm for the metrically plagued). Spacing of 0.5 mm (0.019685" aprox. ) is the smallest standard lead pitch currently.
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  4. On the other end TI won a LOT of business by being cut throat in its pricing. The FAA contract for the American inter route computer around 1967 say. Sylvania chips were faster.
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  5. Every time you go down by a factor of ten in size you get one hundred times as many transistors in an area (approximately). Cut the size by 1,000 and now one becomes one million.
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