Comments by "kazedcat" (@kazedcat) on "Asianometry" channel.

  1.  @akatsuki6371  Overtaking DUV is a complicated question because foundries use the two machine alongside each other. DUV machines has higher throughput so EUV are only used on critical features that can only be done with EUV while using DUV for the rest. For example for the metal layers of a 7nm process. EUV is only use for the first and second layer. For 5nm the 3rd and 4th metal layer is also in EUV and smaller nodes will use them on even more layers. But Processor chips can have up to 12 to 14 metal layers. So DUV machines will not get abandoned. As process nodes that requires EUV grows they will still need DUV to complete the fabrication.
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  2.  @akatsuki6371  They are economically viable. They are using this monster machines for several years now. The foundries raise their wafer prices but the chipmakers have enough margin to absorb the increase in price. It is very economically viable in fact that intel already ordered the version 2 an even larger monster machine.
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  3. If you think EUV optics is crazy then X-ray optics is a lot more crazy. The resist is even more problematic with X-rays. You have backscattering and the photons are energetic enough to alter and cook your substrate.
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  4. They are doing weird things to the light source to get the highest contrast possible and this puts a lot of constraints in the optics geometry. There is just no other way. The main constraint is the intensity of the source itself. Brighter source allows faster exposure. But the intensity is already fix because of how the EUV is generated so they have to resort to optics jujitsu.
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  5. It is already 3d printed at a much faster rate than macro scale 3d printing. The whole fabrication process is printing the 3d transistor structure on top of the silicon wafer then after that printing the 3d labyrinth of wiring on top of the 3d transistor so that they function as a logic circuit.
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  6. The future is a lot harder because you don't know which technology direction will win in the end.
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  7. You need a wavelength that silicon is transparent. This limits your light to infrared
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  8. Why would it be downloadable do you have spare silicon fab in your kitchen?
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  9. AMD will just buy whatever process nodes TSMC delivers. Remember that Intel was overtaken by TSMC because they put too much technology at once that turned into multi generation delay when they could not deliver. This is the same song and dance again Intel chooses multi technology jump while TSMC chooses to do one step at a time.
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  10. TSV is not the critical step in BSPN it is the grinding into precise nanoscopic thickness.
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  11. The parts are not off the shelf component. They are custom parts tailored to ASML's design. The design itself is the outcome of a multi year research and development.
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  12. Intel recently rename their nodes so that they are comparable to TSMC.
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  13. No EUV use gravity to drop a droplet of molten tin which is then vaporized with high intensity laser. Doing it in 0g makes the process of hitting a droplet of molten tin with lasers a lot harder because the droplet will float into random direction.
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  14. No. Just because you have already melted the salt does not mean they are charged. This are rechargeable battery you need to charge them. Getting melted salt is just preconditioning so that the battery can actually be charged.
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  15. Smaller transistor= smaller impedance= faster switching.
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  16. Removing all logic removes a lot of noise these allows higher density. The thing with SRAM is that it is partially analog. The two bitline does not only carry data but they also serves a function when reading and writing. When you have logic that is very noisy the bitlines are giant antenna that might flip the state of the SRAM cell.
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  17. Are you willing to pay the man-hours needed for your optimized calculator?
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  18. linkzable I just read the article on soft x-ray it is not even lithography just x-ray imaging. X-ray imaging is the device use in hospitals to see your skeleton. It is a completely different technology. Yes now you can see your bones at a higher resolution but you cannot use it to manufacture microchips. Even the optics use for imaging is completely different to the optics use for lithography. And then where is the technology for x-ray mask. Where is the technology for x-ray photoresists. Where is the technology for 2nm features overlay. Where is the technology for x-ray aberration correction. Lithography is not just firing lasers in fact firing lasers is the most trivial component in lithography.
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  19. linkzable Your contacts are idiots. Again where is the x-ray mask technology. Where is the x- ray photoresists technology. Where is the overlay technology. Where is the aberration correction technology. If they think lasers = lithography then they are dumber than a glue sniffing monkey. And since you believe their rambling induced by their glue sniffing high your intelligence must be even lower than theirs.
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  20. E beam lithography is to slow. It is good for laboratory prototypes but not for mass production.
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  21. Process nanometer is marketing. 1nm process is actually 20nm pitch. We are nowhere near atomic resolution except for layer thickness.
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  22. Tooling is highly reusable while the mask is consumable. Every new chip design needs several hundred different masks but you can reuse the EUV scanner.
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  23. It is very good technology but expensive. Gamers could not afford them but AI companies could.
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  24. This are work by hundreds of engineers from all over the world. Improving fabrication technology is a global effort.
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  25. 13.5nm needs vacuum chamber because air is opaque to the wavelength so immersion lithography where they use ultra pure water as focusing lens is not possible with EUV. But multi patterning is possible with EUV and it is part of the roadmap for future improvement.
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  26. Transistor are tiny on off switches. If you put voltage on the gate it turns on the source to drain line. Imagine you have a redstone line with a cut off device in between. When you put a redstone signal to the side of the device it cuts off the redstone line. I believe this is how locking relay works. If you put a redstone relay in between a redstone line then put a strong signal to the side it locks the relay and cut the redstone line.
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  27. Even if all ice on earth melted sea level will not rise more than 2 meters. Floating structure does not work for heavy industry nor high density residential. Singapore just don't have enough space for a sprawling floating city. For now importing sand is cheaper if that become a problem then the next less expensive solution is to put their industry underground.
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  28. ​ @brodriguez11000 It is already the printing industry way. The modern printing industry uses lithography technology not the imprint technology use in Gutenberg prints.
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  29. ​ @Gameboygenius It's not economically unviable just economically not competitive. The issue is throughput but as the EUV tech becomes more and more expensive with hyper NA and quad patterning there should be a crossover point where nano imprint becomes competitive. NIL's yield issue is independent of resolution but EUV's yield becomes more problematic as you shrink the features.
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  30. Making complex 3d structure transistor requires several steps. This steps involves multiple passes to your expensive lithography equipment. That means each wafer will have to amortize a larger fraction of the equipments capital and maintenance cost.
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  31. LEGOS LEGOS LEGOS LEGOS LEGOS LEGOS LEGOS LEGOS LEGOS LEGOS LEGOS LEGOS
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  32. No EUV uses different resist and also uses different mask technology. What they learned on DUV does not apply to EUV.
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  33. With GAAFET they can move the source and the drain closer together shortening the channel length of the transistor. Also with nanosheet the fin are now sideways and on top of each other so they don't take as much area as current multi-fin transistor.
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  34. The problem is not propagation the problem is keeping the signal to noise ratio so that it is still possible to recover the signal in the other end.
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  35. All AI technology needs advance processors. We are now at the age of drone warfare. The smarter the drones the more significant the advantage. Imagine a swarm of drone carrying high explosive suicide bombing the very long Russian supply line of trucks stuck in the mud in Ukraine.
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  36. Tiny drones need tiny chips. If tiny drones are smart enough to search and destroy fuel trucks they can stop the advance of an armor division.
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  37. There is e-beam lithography but that is a lot slower than EUV order of magnitude slower even if they figure out the multi beam version.
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  38. AI demands more advanced nodes and they have the money to force going forward.
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  39. We do but mostly it is some form of witch brew that does something useful in the past. Microchip fabrication is in another level of complexity comparable to summoning the demon to do something for you.
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  40.  @h9hkk6155  maybe nano imprint if they can make that work. But multi-patterning is shoe in for future improvements.
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  41. There is no after lithography. The situation is complex but it is not the apocalypse. Yes there is no lithography roadmap after High NA EUV. But there are plenty in the transistor architecture. There is forksheet, CFET, Vertical FET, 2d material channel and many more. This transistor technology together with multi patterned EUV will allow performance improvement for the next decade. The main problem is the escalating cost.
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  42. linkzable Your X-ray laser was actually X-ray imaging not lithography and it is laboratory demonstration very far from mass production. China have no EUV technology. This industry cannot be forced with simple manpower. You need brains not muscle given China's severe corruption in academia smart people don't actually rise to the top to lead the research. China actually have to poach Taiwanese engineers to run their foundries. Then corruption sets in and the Taiwanese engineers quit because of unpaid salary. China is using speed to hand over billions to scammers who pocketed the money
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  43.  @johndoh5182  You don't know how to count you shrink around 30% per generation. So 3nm then 2nm then 1.8nm then 1.2nm and 0.8nm assuming the rate of 2 years per full node shrink will continue then at 2033 we will be at 0.6nm. I am accounting a slow down so 0.8nm in 2033 is a good prediction.
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  44.  @TheEVEInspiration  High resolution scanner are use for critical features but lesser resolution scanners are also use for less critical features. For example 7N process uses an EUV scanner for only the first 2 metal layers while DUV scanners are used for the rest of the 12 to 15 metal layers. The same thing will happen with High NA EUV. At first they will only be used for a few layers while Low NA EUV will be reused for the other layers. Then when Hyper NA becomes available the High NA EUV scanner will be reused for less critical layers.
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  45. b Low China needs to spend 10x of the entire silicon industry if they want to realistically catch-up and not take a decade to develop the technology that will be a decade old by time they manage to replicate it. So start counting the total combine R&D budget of Apple, Intel, Samsung, TSMC, IBM, Qualcomm and others. Multiply that by 10 and that should be the budget China needs to allocate to catch-up.
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  46. Flash and memory chip manufacturer.
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  47. E-beam is to slow. There are research for multibeam E-beam but it becomes complicated very quickly.
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  48. Anything Carbon base is dead end. There is a better 2d material for silicon replacement and it is not Carbon.
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  49.  EMAN67:RP forum  Better conductor but bad switching characteristic. This what most physicist miss. A transistor needs to be able to turn on and off. A transistor that is always on is useless. If you have a microchip that will switch a wrong transistor on by just talking loudly then that would not give you correct calculation. If your computer suddenly do 1+1=3 because the rickroll song is played near it that will be a very annoying defect.
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  50. ​ @CRneu I think silver is worst in diffusion. So you need thicker diffusion barrier which cut space for more conductivity.
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  51. The answer is laser. LIGO has sub proton precision interferometry. Also a LISA demonstrator has performed laser positioning which uses lasers to push objects around for precise alignment.
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  52.  @disadadi8958  If I remember correctly their HBM GPU was late to the market that is why the performance was not competitive. They then switch back to using GDDR in the next generation because HBM is expensive. HBM then find its niche in the embedded market until the AI boom.
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  53.  @Capeau  Again AMD will just buy TSMC'S technology. TSMC is bigger than Intel.
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  54. The previous technology called DUV (Deep Ultra Violet) is 193nm. So yes they are already using UV but not extreme UV which is 13.5nm
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  55. CXL improves the memory capacity problem but not the memory bandwidth problem. The bandwidth problem is limited by the number of pins coming out from your CPU or GPU. TSV is the densest pin out technology we currently have and it is use to increase memory cache.
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  56.  @Fractal_32  RDNA3's high density fan out helps a little but for specialized high end AI hardware. The best solution is to use HBM memory which AMD will use in their next generation compute accelerator.
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  57. Vacuum does not mean free of contaminant. For example the etching process requires acids this acids can contain impurities. Coating process uses electrical discharged this can create unwanted free ions. Photo exposure uses plasma for a uniform light source this plasma can create killer particles. Even the containers use to transport wafers between tooling equipment can have out gassing that chemically react with the wafer. Out gassing becomes a lot more worst at lower pressures.
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  58.  @lystfiskerlars  It would cost more to develop an intermediate step instead of going for a step change. I don't know why it is 15x but they need the new technology to be at least 10x the previous technology to justify the cost of developing it. For intermediate improvement they can rely on multipaterning. Also immersion lithography gives 2x higher resolution so the improvement of EUV over immersion is just around 7x.
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  59. Vent Fin Not likely in the short term. It would take several years for them to match the current state of the art machines. But at that time the industry have move on into more advance technology. Technology research is not stopping and the entire industry is spending multibillion dollars to advance forward. For China to actually catch-up they need to spend 10 times as much as the entire industry. Eventually we will reach the scale of single atom transistor that will be the time China will catch-up when physics itself is preventing the industry from moving forward.
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  60. linkzable linkzable Please stop commenting on technology you don't understand. Photoresist use different chemical depending on your photon wavelength. 14 nm DUV scanner is advance clean air chamber and optical lenses. 5nm EUV scanner is vacuum chamber and mirrors. X-ray would need exotic meta material. The archeticture between DUV and EUV is completely different you are actually asking if you can build a fishing boat why can't you build a passenger aircraft they both carry people so boat builders should have all the knowledge of building a plane. A completely moronic question.
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  61. Water is very good solvent. The killer particles that is in your wafer is dissolved into the UPW. The property of water to attract impurities is why you want them for cleaning.
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  62. If you include organic compound then carbon will win but if you limit the scope to inorganic crystals then silicon wins.
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  63. Nothing, it is going to be multi- patterning all the way down.
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  64. We are nowhere near the atomic limits. The node name are marketing name with the actual physical transistor a lot larger than the names imply.
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  65.  @petergerdes1094  We have laboratory demonstration of MoS2 FET with 7.5nm channel length that is half the wavelength of EUV which is 13nm. High NA EUV with quad patterning will have trouble printing at 7.5nm resolution.
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  66. nzoomed The photoresists needs time to develop so e beam scanning is limited by the photoresist.
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  67. Utilizing parallelism is very very hard. But currently the bottleneck is the memory. It's possible to design a faster processor but feeding them with data could not keep up. So ten years from now most likely memory will be integrated in the CPU package. There are already CPU and GPU architectures that do this. It will become a lot more common in the future.
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  68. Nanometer size particle can float and be carried by the evaporating steam.
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  69. Filtering for ultra pure hydrogen and ultra pure oxygen is a lot harder. Particles at nanometer size can float and be carried by gasses.
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  70. The problem is that you are starting from a small seed crystal. Making it square will be very difficult. Even if you start with a square crystal as it grows the corners gets rounded until you end up with a circle-ish shape.
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  71.  @homelessrobot  Yes the size of a set is important but the structure of your numbers are even more important. Is it a ring, a field, or a group. Is the multiplication associative, does it have a a zero product. Is it close under division, does it has a square root of a negative. For example a number system where only primes are allowed it is countably infinite the same size as natural numbers but it is a lot harder to work with because your basic operations +,-,× does not work properly.
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  72. They don't use DC motor. All Tesla drive motors are AC and their power inverter is one of the key technology on most of their products.
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  73.  @user_375a82  For EUV never but there are laboratory scale equipment that can do the similar or even better resolution but at a very slow rate.
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  74. A faucet that does not turn off is extremely inefficient. Yes you have very low energy loss when running but it is always running so you are in fact wasting a lot of energy. Think of an inefficient aircon that only runs 2 hours per day vs. a very efficient aircon that runs 24/7. The inefficient aircon will consume less energy after a month of operation.
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  75.  @ueaj4576  That is a second issue. With thin bandgap tiny noise energy is enough to turn 0 to 1.
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  76. A swarm of drones suicide bombing your very long supply lines will stop your main battle tanks from advancing. Your tanks need to refuel and they cannot do that if the fuel truck is a smoldering wrecked due to drone attack. Tiny drones needs tiny chips.
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  77.  @spicynoodle7419  If you use 90nm chip then your tiny drone will drop out of the sky before finding targets due to being too power hungry.
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  78. You need to consider that ASML is not standing still. Already they are moving to a more advance High NA EUV scanner they also have upgrades for increase throughput. China may have plans to get into EUV but that is not the finish line.
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  79. linkzable Prototype vs. Production. E beam lithography already exist which is better than x-ray lithography. IBM has already demonstrated single atom features decades ago. ASML equipment is for high volume mass production. Currently millions of microchip fabricated using 13nm EUV is being delivered into customers hand not one off lab prototype that IBM already exceeded for already a decade. So how many microchip using 2nm X-ray lithography has China produce? Have they even built a working processor? Or is it just demonstrating that they can draw grid lines using X-ray.
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  80. They suffer the same problems. They need to scale up to be cost competitive but scaling up does not create the market. So if they organically grow their market their cost is not competitive but if they jump to quick scaling and reduce cost they have no market to sell.
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  81. Reliability is insignificant because of plan obsolescence. It does not matter if the tool last for 30 years when the shelf life of the technology is only 5 years. Yes you can fab 5nm process until 2033 that does not help you when the industry has already move on to 0.8nm.
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  82.  @CRneu  So reliability is not an issue with photolithography tools and they last a lot longer than what is necessary.
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  83. Edu Wino That is why I assigned a 10x multiplier instead of just 2x. It factors in the inefficiency inherent in the system.
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  84.  EMAN67:RP forum  Carbon has bandgap problem they should switch studying on other 2d material that is not Carbon.
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  85. Lasers. I am not 100% sure but precision equipment got to have lasers somewhere.
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  86. We do have an organic process to manufacture things. This is how we produce RNA vaccines. The process is a lot messier and a lot slower than the physical plasma assisted process of chip fabrication.
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  87.  @Urgelt  In theory it sounds good but in reality you have protein misfolding, genetic mutation, offsite interaction, ionization damage, stochastic side reaction. Biological processes are very very messy.
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  88.  @Urgelt  But the problems are fundamental to the system. You can't simply stop genetic mutation or prevent protein misfolding. A very basic problem for chip fabrication is validation and testing. In biotech this is equivalent to identifying cancerous cells and then removing them. Curing cancer is a necessary step to be able to validate and bin functional biomachines. Unless we have a cure for cancer I don't believe that biomachines are technically possible.
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  89.  @Urgelt  I believe the tech when it delivers the cure for cancer. Test and validations that is the minimum requirement for mass production. No one will use a smartphone that randomly gives you aids.
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  90.  @PainterVierax  HBM is just expensive all those TSV cost a lot. AMD is now trying to use SRAM chiplet to amplify effective bandwidth. SRAM for gaming HBM for AI.
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  91. The problem is not only efficiency but also noise. A tiny amount of energy can flip the state of the transistor so any circuit using the material will be extremely unstable and will not provide reliable and correct computation.
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  92. High NA have 16nm resolution. Double patterning gets you to 8 nm resolutionand quadruple patterning gives you 4nm. I think they will stay with EUV and just enlarge the reticle. Fabs will have to use multi patterning to get to smaller resolution.
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  93. They are not going to catch up. The total investment on improving the semiconductor industry is enormous. Russia would bankrupt trying to match it. They also don't have the expert workforce needed to undertake the task. Even the US could not spend their way to bring the latest process node in the country. TSMC will build a 5nm fab in the US but they are already at 3nm. The semiconductor industry is a technology train that never stops and always full speed ahead. One misstep and you will be left behind with no hope of catching up. This is what is happening to Intel.
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  94.  @Flankymanga  Gold don't make EUV scanner. You need expert engineers 15 years and unlimited budget to make a prototype.
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  95. No. EUV is 0.33NA and High NA EUV is 0.55NA.
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  96.  @disadadi8958  If the sine wave is 10khz then a PWM of 1Mhz is more than enough. SiC could handle that.
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  97.  @disadadi8958  It is not that simple you can over built things. For example using 200A device for 100A application. Yes GaN has a better efficiency curve but you can brute force efficiency by climbing down the efficiency curve to match whatever is your efficiency target.
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  98.  @disadadi8958  People optimize for dollars per effective range. Currently GaN is not competitive in price even SiC is a pricier option with low cost EV using only power MOSFET. Tesla has invested a lot on SiC production to gain economies of scale. Someone needs to do the same on GaN to drive down the cost. SiC has the production advantage and the difference in efficiency does not out weigh the difference in cost.
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  99.  @disadadi8958  When industrial technology gains scale it becomes really hard to displace. Just look at Silicon. It becomes a humongous industry that any competitor becomes relegated to niche application. Even in EV application Silicon is still being utilized for power electronics even if GaN and SiC are so much better.
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  100.  @bubblebobble9654  It is a repeat. Does Intel have more engineering resources now compared to when they are leading? If you can prove that current Intel engineers are more competent than before then maybe this time it is different.
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  101.  @awesomewav2419  AMD will not buy from Intel fabs for leading edge. AMD is heavily invested in TSMC's technology stack. Switching everything to Intel's Technology stack would take a decade of work.
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  102. No SRAM is far larger. It will not reach DRAM level of cell density anytime soon.
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  103. Microgravity could ruin the crystal structure.
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  104. ​ @M4nusky Not exactly a conductor but without a gap a small amount of energy like the energy release when you clap your hands can flip the state of a transistor. So it is a very unstable switch.
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  105.  @RooMan93  Security code is much more expensive in man hours. A developer who understand discrete elliptic curve is very rare.
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  106.  @RooMan93  The industry already have a solution for that a security library. This way underpaid developer will not be touching any security codes and just use API calls to access them.
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  107. Real capitalist only talk in terms of profit. Those other ideology likes to attach themselves to capitalism to stay relevant. He like to frame things in terms of cost, marketability, and returns. That is the capitalist way of talking.
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  108. It's not necessarily true. In fluid dynamics if you scale everything down the Reynolds number changes. So it needs to be proven that there is no similar factor happening in microelectronics.
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  109. Search YouTube for EUV Scanner
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  110. Short answer yes. The long answer leakage is an issue but there are a lot of tricks that can be applied to mitigate the problem. One of this tricks is switching transistor architecture from FINFET into GAAFET
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  111. No ASML makes the equipment's(oven) they install it on foundries fab(kitchen) the foundries figure out the new recipe using the new oven then they cook the new recipe for the fabless chip maker like Nvidia and AMD. Intel cook for themselves because they have their own kitchen(fab)
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  112.  @Erik-rp1hi  Yes TSMC figures out the design rules then industry partners use this design rules to design chips.
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  113. Sadly it is not that simple. Signal propagation is still bound to RC delay. So even if charge mobility is instantaneous. RC delay will still limit the frequency of a processor.
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  114. ​ @ralanham76 We are already taking advantage of quantum tunneling. The power wall is mostly a classical physics problem not a quantum physics problem.
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  115. Atomic deposition has been around for a long time. With it you can deposit a layer of material 1 atom thick. Mirrors also needs a perfect shape so it is highly likely that the aberrations specs are derive from the mirrors geometric shape.
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  116.  @petergerdes1094 First 2nm node process actually has a 20nm wide transistor, silicon latice are 0.2 nm apart so a 2nm transistor has 100 silicon atoms across. Second we are not using bulk silicon property, Field Effect gets stronger the smaller the features are and the only thing that limits things getting smaller are leakage current and quantum tunneling. Both of this limitation has tons of tricks we can use to mitigate the problems. In conclusion we are nowhere near a hard wall that stop shrinking transistor but we are already on a very steep hill and climbing it gets more and more expensive.
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  117.  @petergerdes1094  CMOS only has either N or P type. They work because the field effect of the metal gate directly creates holes or electrons. The doping is done to manipulate the threshold voltage but with enough gate voltage it is possible to force undoped semiconductor to have the same channel effect. Field effect transistor does not require bulk material mechanics. We have laboratory devices that work using a single layer of 2d lattice material. In fact the field effect works much better using 2d material than bulk silicon semiconductor. This is the direction we are going after moving to the nano ribbon silicon gate all around FET The next step is replacing the silicon channel with 2d ribbon material. This is a field effect transistor using a single layer of 2d molecular lattice.
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  118. Yes this machines has been planned for decades. The industry itself have schedules and roadmaps that everyone agrees on and they have regular meetings that updates the schedules and roadmaps With any unexpected factors
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  119. nzoomed There are some research on using multiple e beam to speed up scanning but I don't think it can compete with the speed of photolithography. Using it to create mask is okay because mask is reuse several hundred times so output is amplified.
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  120.  @nzoomed  Photoresist is driven by chemical reaction. Faster reaction means less precision which is what you want by using e beam.
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  121. No a transistor that does not turn off is not efficient at all.
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  122. They probably have IP licensing revenue but that is peanuts compared to their other businesses. Their gaming console revenue alone would dwarf their IP revenue and that console chip business is the lowest margin segment of their income. AMD has a lot of businesses.
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  123.  @lucasfernandesgrotto6279  AMD likes to bet on technology sometimes it works sometimes it doesn't. Bulldozer was failure but they are trying something new with that architecture. Chiplet on CPU works and it is now giving them advantage over Intel. Chiplet on gaming GPU is kind of not working but maybe they can make them work later. HBM was one of those bet and the technology works but the financial side was not working for them then.
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  124. Dilute the brine with sea water 100:1
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  125.  @volkhen0  There is not enough ice to cover the entire earth with additional water 70 meters high. Ice is less dense than water so if your projection is true then the equator should be covered right now with more than 70meters of ice. Just look at the surface area of the earth covered in ice that is a tiny fraction compared to the entire surface of the earth. Also yes a significant portion of the polar ice cap has melted already. And don't expect the sea level to continue its rise indefinitely the volume of ice on earth is not infinite.
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  126. You copy pasted your comments. Did you pay for the IP?
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  127.  @paulmichaelfreedman8334  Laser is still photolithography unless you are using laser to directly burn spots in the paper to print an image.
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  128. ​ @homelessrobot But planck scale is not digital yes they are quantize but quantum object does not behave like classical object. So instead of bits you are dealing with qubits. And when dealing with qubits entanglement and decoherence becomes a problem which is a lot harder than analog.
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  129.  @homelessrobot  Think of it this way. digital means integer (Z). Analog means real numbers (R). Quantum objects are complex integers (Z×Z). Yes they are countable but they are a ZxZ set instead of just Z.
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  130. The Internet is content theft. Ban the internet.
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  131. Even with recycling there is still waste water. Reverse osmosis has two output stream. One output water with less impurities than input and the other output water that has more impurities than the input. You cannot feed back the dirty water back at the input because that will reduce the purity of clean output. In multiple stage purification you can use the dirty output of later stages as input for the early stages but the chain ends on the first stage where you have raw water as input and you have dirty water output that is less pure than raw water and ends up as waste water.
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  132. In addition to this they are manipulating the shape of the light. They need a dipole light source for increase resolution.
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  133.  @tylerdurden3722  They use a mirror to focus the light into a circular beam. A second mirror to convert a circular beam into an annular beam. Then a third mirror to convert annular beam into a dipole beam. This is before the beam hit the mask . Then after reflecting from the mask there are a set of mirrors for magnification and aberrations correction.
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  134. They could not buy the machines to reverse engineer.
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