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Grak70
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Comments by "Grak70" (@Grak70) on "Asianometry" channel.
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@GalvayraPHX pretty poorly I’d say, considering you’re just puking up whatever cack-handed scribblings you read five minutes ago on Breitbart.
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@Formosan I retract what I’ve said about the pay. On a cost of living basis, TSMC pay is very generous (although less senior engineers live like paupers on their salary waiting for that bonus). Median engineering pay seems to be about $120k/year after bonuses which is pretty generous. The only thing I stand firm on here is the complete lack of work-life balance. I spent years going to Fab12 and Fab14 and having meetings with photo engineers and even after years working there, they basically have no life. I never had a meeting where anyone who wasn’t a big shot didn’t have a hairnet line in their forehead. They only come out of the fab to take a dump.
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It’s always etch’s fault. Even when it’s photo’s fault. 💕
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@Daz912 if you like that environment you’re the exception. And if you’re a foreigner, you’re being given special treatment and leeway anyway, so nobody should take your experience seriously.
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@Daz912 more than some token gaijin who loves his strings even though all the Japanese corpos around him privately think he’s a talking monkey. Assuming anything you’ve said is remotely true that is.
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Nano imprint will never replace EUV. It’s too slow, too defect prone, and they’ll never solve the overlay issue. All the single digit overlay data you see in Canon’s propaganda material is massaged to hell.
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While it’s obsolete for silicon technologies, resist undercut is extensively used as a desirable feature of liftoff patterning where gold is used to carry current (gold has no volatile halides, so it cannot be dry etched). This is still very common in GaAs power amplifier technologies.
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At the time, it was seen as the only way ASML was going to force Intel’s hand to buy from them. I think if Intel had understood how unstable and hollowed out SVG was, they would have switched earlier.
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@TamagoHead all good. It’s a ridiculously specialized field. To the point I probably can’t get a job doing anything else at this point. And yeah, Motorola was truly a king of industry in semiconductors for a long time. In the end, I think bad management, bad culture, and bureaucratic bloat got them.
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No, he is correct. Memory capacity IS reported in bits. Because the cell size to store one bit is the critical scaling factor, not the word line size.
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I think the issue with X-ray was you had to make the masks out of pure beryllium or something similarly crazy. The material science is wicked hard. And back when X-ray was being proposed, they were hoping it could do like 100nm half pitch. You can almost do that with a KrF system nowadays.
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@epicsuper6775 so economically unviable, Samsung has one of the biggest fab complexes in the world in Austin, TX making one of the lowest margin commodities in semiconductors? And has for two decades?
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@epicsuper6775 then it’s pretty weird how Samsung did it like a dozen times and still makes money on razor thin margin products.
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Yeah that was either bad writing or a misunderstanding. He was describing bulk pricing but misinterpreted it as an insanely low unit cost.
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@neilkurzman4907 I wanted to make a post about this exact thing but you said it better. For decades semiconductor companies have been in a feast to famine cycle of greedily chasing capacity. Much like the oil and gas refining industry this time around, when customers and governments pissed and moaned about building extra capacity, knowing the business cycle has busted every time and they’ve been left holding the bag, they said no. It feels like maybe we finally learned our lesson about chasing our own tail to overproduce in good times.
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It’s a PAS5500 body DUV scanner. The Illuminator optics train in the back is behind the projection optics, in the direction of the excimer laser unit peeking out behind it.
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@LuaanTi I’m not reading all that but I’m happy for you.
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Let’s see if they build a KrF or ArF scanner worth two farts first…
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@ganganbam workshop that joke. Don’t give up, you’ll be funny someday.
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@sooocheesy very true. It’s much more difficult to make a large piece of CaF2 with uniform optical properties than fused silica/quartz. As such, high NA optics were always going to be a problem.
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@tonysu8860 that would strongly depend on whether you stock it with new tools or used ones; preferably used ones you already own. If the latter is the case and the equipment is already depreciated, it might make financial sense to build a fab shell and start it up. But then why weren’t you doing it already? Semiconductors just don’t allow for this kind of “go back and capture old nodes/tech” business model. A good example of one case where this worked was when TI built RFab in Richardson, TX. The only reasons they were able to start up a 300mm analog line was 1) they had already built the fab shell when the subprime mortgage crisis shit the bed and 2) Qimonda had just gone under hard and sold a massive amount of 300mm tool assets for cents on the dollar. That sort of confluence of chance almost never happens.
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He’s pretty much just trolling at this point to avoid admitting he made a mistake early on. Don’t waste your breath.
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In practice you always trade selectivity for directionality. A heavy non-reactive ion like argon will etch straight down, but it won’t distinguish between layers and the etch products will sputter rather than diffuse away from the surface. Purely chemical reactive species with low ionization will be very selective, but won’t interact with the plasma electric field strongly, so they will etch isotropically like a wet etch. In practice, you either alternate etch chemistry to form a passivation layer that prevents isotropic etching or strike a balance between etch species to achieve the profile you want.
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I had always thought one of the main reasons ASML bought SVG is because SVG held the patents for catadioptric lens design. Of course nothing came of that, but it wouldn’t be the first time a M&A happened for IP that never got used.
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I should clarify: while indeed consumers are marketed to with DIMM capacities in bytes, manufacturers and semi industry in general spec memory chips in bits.
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It’s kind of a limitation in the opposite direction. Japan is hyper protective of its cutting edge research and has been for decades. At my former job we were contacted by Selete about a product we made and they wouldn’t even let us come to their office for a sales meeting. Japan and the US may be defense partners and a macroeconomic powerhouse together, but Europe is by far easier to work with and has closer diplomatic ties that make basic research collaboration more feasible than Japan. It’s also not a coincidence that ASML had been eating the Japanese’s lunch on exposure tools since 2005 and had reached global sales parity with Nikon since the early 1990s. The DOE and US partners probably saw the writing on the wall and they were not wrong.
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@4473021 fab engineering is not IT. What are YOU on about?
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@azuaraikrezeul1677 all well and good until Winnie the Pooh steals your assets.
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Surprising because it’s laughably untrue. Think about it for even ten seconds and you’ll see why.
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@elchippe ok, it’s 6 years later. Where’s the production tool?
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@PaulFisher no problem! By the way, notice that cause 1 and cause 2 are in competition! If you tilt the mirror more, you can divert more light, but then you are exposing the substrate even more. So there is a complex trade-off between the torsion material flexibility and lifetime, the substrate reflectivity, and the view factor of the mirror all interacting with a non-ideal source. Still pretty cool it works at all though!
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@Hallettjs7957 Intel did it, yes. The largest most cash flush semiconductor company on the planet did it. Once. Analog and discrete makers aren’t working with that kind of capital. And if they’re III-V substrate forget it; the wafers don’t even exist.
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@dieSpinnt with all due respect you have no idea what you’re talking about. Semiconductor fabs are not like Chinese sweat shops spitting out wax lips and Tupperware.
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@p-jbroodbakker1303 yup. That 157 tool was complete insanity. And a few months after it was completed they realized only the final few elements needed to be pure CaF2 and the rest of the optics train could be fluorine-doped fused silica. A real head slapper.
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The whole "I can't take feedback about a mistake I made so I'm going to play it off as trolling" attitude is dumb. Taking feedback from people who actually work in this industry with a little grace improves your credibility.
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Japan also backed the wrong source technology. DPP vs LPP was the VHS vs. Betamax of the EUV race.
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It’s all fun and games until that MESFET discrete your fancypants state-of-the-art module needs is backordered!
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Lol why would they give it to some rando for free?
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Not to mention you cannot make field term corrections if previous layers were exposed by stepper/scanner.
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Imprint is cute but it can’t really overcome its throughput problem. Maybe a niche market but never gonna make consumer processors or dram with it.
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Awesome! I asked for this topic last year! I’m so glad to see you explored this cool tech.
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A lot of the reason 450mm died was the equipment folks NOT wanting to get screwed like they did with 300mm. They still got screwed on 450, but not as bad as if they’d gone all in.
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@rkan2 ah…no? Lol
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It depends how quickly you can turn a mask layer. If the process is complicated and has to go back through lithography more than a couple times, even not factoring in yield loss from errors this introduces, you can’t justify buying and depreciating the tool for the output of that process. When your EUV scanner costs $150M-$200M, how fast you can pump money out of it is basically all that matters.
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It’s not like Japan and China don’t pour obscene amounts of cash into their domestic sub-industries that support semiconductors. And they’ve been doing it for decades. Especially Japan; you wanna talk about protectionism lol… At this point, sovereign financing is the only way you’re going to get anywhere in this industry.
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The bigger problem is that 157 is not simpler and wouldn’t really push very far beyond what can be done with KrF and phase shift masks. Even before 157 was de facto cancelled by Intel dropping its support, researchers were struggling to find resists transparent enough for decent patterning. And the search for high RI liquids transparent to 157 that would work for immersion was even less fruitful. Combined with CaF2 birefringence issues even the experts at the time struggled with, and I can’t see this ever being worthwhile or fruitful.
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@imeakdo7 a lot of papers were written about 157 for a solid decade and it’s still dead. I worked in one of the chemistry labs whose focus was resist formulation when 157 resist screening was hot. It’s not coming back. Inevitably any fluid used for immersion is going to be a fluorinated hydrocarbon and they release fluorine and HF when irradiated. The last thing you want in your quartz optics train is HF. And that’s just one problem with 157 nobody ever figured out a way around. China is not going to solve the myriad problems with 157 when it can’t even produce a 248 scanner that works.
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It has interesting properties, but in general not scalable to replace silicon. GaN wafers are formed by MBE on either sapphire, SiC, or silicon. Wafer sizes above 4” on sapphire or SiC and 6” on silicon just aren’t practical, therefore they can’t benefit from the economies of scale already present at 300mm silicon.
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@J_X999 not sure what that entails if they’re already embargoed. The West isn’t going to stop them developing their own native tech ecosystem. Or at least trying to.
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Basically irrelevant. These are different worlds.
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