Comments by "" (@grokitall) on "BREAKING: Intel, AMD, Linus and more team up to save x86" video.

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  14. ​ @sarthakdash3798 it might be, but the point it makes comes straight from the 1970s ibm research on how most cisc chips contain instructions which are often both slow and buggy, and how optimising the compiler to generate fewer of these instructions and thereby only use a smaller part of the instruction set actually produced better, faster and less buggy code. cisc came about because we did not have either the knowledge to build, or the resources to run such advanced compilers. risc came about because cisc is a nightmare from so many different angles that people thought it a good idea to try a different approach, and it worked. the gpu issue is different. both cisc and risc use a single stream of instructions working on a single stream of date. sisd for short. gpus still use the single stream of instructions, but every point has different data, or simd, which has advantages for some workloads. then you have the third case, multiple instruction streams with multiple data streams, which was researched by danny hillis and others in the 1980s. this is basically multicore with advanced inter core communications, and cisc is really bad at it compared to risc just due to the extra size and power needs per core, which is why things like thread rippers need something that sounds like a jet engine on top to stop it overheating. again, smp works well for some workloads, not so well for others, which is why cisc designers are making chips with a mixture of slow efficient cores and fast power hungry ones, an approach not needed with risc.
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