Comments by "SeanBZA" (@SeanBZA) on "Asianometry" channel.

  1. The highest power user in modern processors is just the distribution of various clock signals around the die, with more than half of the active power being used to drive clock signals that are used to latch the assorted logic systems. that is why there is so much research in cutting clock supply to any unused parts, even if only for a single clock cycle, not running that clock for say half of the individual ALU of a core, which for a cycle or two is not actively doing work, means a big power saving. Even the bus latches that are tri stated and not actively driving an internal bus will benefit from not having the internal latching clock, almost always there to latch the internal state before delivering it out, being turned off as well. That along with non clocked logic that relies on propagation delays to provide a smooth execution path, are all things done to reduce power use. If you want crazy look at how small cheap chips generate their internal clocks, using an evolved set of logic that, due to quantum interactions between gates supposedly not connected, makes for a clock system that both self starts, does not use large areas of silicon to make RC systems, the old approach, but instead becomes a VLSI macroblock of literal magic that you drop in from the EDA tool, designed for that exact process, that will magically spit out a clock with a reasonably constant frequency, and which is all within 5% on all chips, good enough to use to run say USB devices with no need for the 11MHz crystal normally used to allow the communications to take place, using the internal clock to start up, and then having another clock derived from the signalling to talk back.
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