Comments by "kazedcat" (@kazedcat) on "Asianometry" channel.

  1. The answer is laser. LIGO has sub proton precision interferometry. Also a LISA demonstrator has performed laser positioning which uses lasers to push objects around for precise alignment.
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  2.  @disadadi8958  If I remember correctly their HBM GPU was late to the market that is why the performance was not competitive. They then switch back to using GDDR in the next generation because HBM is expensive. HBM then find its niche in the embedded market until the AI boom.
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  3.  @Capeau  Again AMD will just buy TSMC'S technology. TSMC is bigger than Intel.
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  4. The previous technology called DUV (Deep Ultra Violet) is 193nm. So yes they are already using UV but not extreme UV which is 13.5nm
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  5. CXL improves the memory capacity problem but not the memory bandwidth problem. The bandwidth problem is limited by the number of pins coming out from your CPU or GPU. TSV is the densest pin out technology we currently have and it is use to increase memory cache.
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  6.  @Fractal_32  RDNA3's high density fan out helps a little but for specialized high end AI hardware. The best solution is to use HBM memory which AMD will use in their next generation compute accelerator.
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  7. Vacuum does not mean free of contaminant. For example the etching process requires acids this acids can contain impurities. Coating process uses electrical discharged this can create unwanted free ions. Photo exposure uses plasma for a uniform light source this plasma can create killer particles. Even the containers use to transport wafers between tooling equipment can have out gassing that chemically react with the wafer. Out gassing becomes a lot more worst at lower pressures.
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  8.  @lystfiskerlars  It would cost more to develop an intermediate step instead of going for a step change. I don't know why it is 15x but they need the new technology to be at least 10x the previous technology to justify the cost of developing it. For intermediate improvement they can rely on multipaterning. Also immersion lithography gives 2x higher resolution so the improvement of EUV over immersion is just around 7x.
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  9. Vent Fin Not likely in the short term. It would take several years for them to match the current state of the art machines. But at that time the industry have move on into more advance technology. Technology research is not stopping and the entire industry is spending multibillion dollars to advance forward. For China to actually catch-up they need to spend 10 times as much as the entire industry. Eventually we will reach the scale of single atom transistor that will be the time China will catch-up when physics itself is preventing the industry from moving forward.
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  10. linkzable linkzable Please stop commenting on technology you don't understand. Photoresist use different chemical depending on your photon wavelength. 14 nm DUV scanner is advance clean air chamber and optical lenses. 5nm EUV scanner is vacuum chamber and mirrors. X-ray would need exotic meta material. The archeticture between DUV and EUV is completely different you are actually asking if you can build a fishing boat why can't you build a passenger aircraft they both carry people so boat builders should have all the knowledge of building a plane. A completely moronic question.
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  11. Water is very good solvent. The killer particles that is in your wafer is dissolved into the UPW. The property of water to attract impurities is why you want them for cleaning.
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  12. If you include organic compound then carbon will win but if you limit the scope to inorganic crystals then silicon wins.
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  13. Nothing, it is going to be multi- patterning all the way down.
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  14. We are nowhere near the atomic limits. The node name are marketing name with the actual physical transistor a lot larger than the names imply.
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  15.  @petergerdes1094  We have laboratory demonstration of MoS2 FET with 7.5nm channel length that is half the wavelength of EUV which is 13nm. High NA EUV with quad patterning will have trouble printing at 7.5nm resolution.
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  16. nzoomed The photoresists needs time to develop so e beam scanning is limited by the photoresist.
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  17. Utilizing parallelism is very very hard. But currently the bottleneck is the memory. It's possible to design a faster processor but feeding them with data could not keep up. So ten years from now most likely memory will be integrated in the CPU package. There are already CPU and GPU architectures that do this. It will become a lot more common in the future.
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  18. Nanometer size particle can float and be carried by the evaporating steam.
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  19. Filtering for ultra pure hydrogen and ultra pure oxygen is a lot harder. Particles at nanometer size can float and be carried by gasses.
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  20. The problem is that you are starting from a small seed crystal. Making it square will be very difficult. Even if you start with a square crystal as it grows the corners gets rounded until you end up with a circle-ish shape.
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  21.  @homelessrobot  Yes the size of a set is important but the structure of your numbers are even more important. Is it a ring, a field, or a group. Is the multiplication associative, does it have a a zero product. Is it close under division, does it has a square root of a negative. For example a number system where only primes are allowed it is countably infinite the same size as natural numbers but it is a lot harder to work with because your basic operations +,-,× does not work properly.
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  22. They don't use DC motor. All Tesla drive motors are AC and their power inverter is one of the key technology on most of their products.
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  23.  @user_375a82  For EUV never but there are laboratory scale equipment that can do the similar or even better resolution but at a very slow rate.
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  24. A faucet that does not turn off is extremely inefficient. Yes you have very low energy loss when running but it is always running so you are in fact wasting a lot of energy. Think of an inefficient aircon that only runs 2 hours per day vs. a very efficient aircon that runs 24/7. The inefficient aircon will consume less energy after a month of operation.
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  25.  @ueaj4576  That is a second issue. With thin bandgap tiny noise energy is enough to turn 0 to 1.
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  26. A swarm of drones suicide bombing your very long supply lines will stop your main battle tanks from advancing. Your tanks need to refuel and they cannot do that if the fuel truck is a smoldering wrecked due to drone attack. Tiny drones needs tiny chips.
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  27.  @spicynoodle7419  If you use 90nm chip then your tiny drone will drop out of the sky before finding targets due to being too power hungry.
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  28. You need to consider that ASML is not standing still. Already they are moving to a more advance High NA EUV scanner they also have upgrades for increase throughput. China may have plans to get into EUV but that is not the finish line.
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  29. linkzable Prototype vs. Production. E beam lithography already exist which is better than x-ray lithography. IBM has already demonstrated single atom features decades ago. ASML equipment is for high volume mass production. Currently millions of microchip fabricated using 13nm EUV is being delivered into customers hand not one off lab prototype that IBM already exceeded for already a decade. So how many microchip using 2nm X-ray lithography has China produce? Have they even built a working processor? Or is it just demonstrating that they can draw grid lines using X-ray.
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  30. They suffer the same problems. They need to scale up to be cost competitive but scaling up does not create the market. So if they organically grow their market their cost is not competitive but if they jump to quick scaling and reduce cost they have no market to sell.
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  31. Reliability is insignificant because of plan obsolescence. It does not matter if the tool last for 30 years when the shelf life of the technology is only 5 years. Yes you can fab 5nm process until 2033 that does not help you when the industry has already move on to 0.8nm.
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  32.  @CRneu  So reliability is not an issue with photolithography tools and they last a lot longer than what is necessary.
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  33. Edu Wino That is why I assigned a 10x multiplier instead of just 2x. It factors in the inefficiency inherent in the system.
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  34.  EMAN67:RP forum  Carbon has bandgap problem they should switch studying on other 2d material that is not Carbon.
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  35. Lasers. I am not 100% sure but precision equipment got to have lasers somewhere.
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  36. We do have an organic process to manufacture things. This is how we produce RNA vaccines. The process is a lot messier and a lot slower than the physical plasma assisted process of chip fabrication.
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  37.  @Urgelt  In theory it sounds good but in reality you have protein misfolding, genetic mutation, offsite interaction, ionization damage, stochastic side reaction. Biological processes are very very messy.
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  38.  @Urgelt  But the problems are fundamental to the system. You can't simply stop genetic mutation or prevent protein misfolding. A very basic problem for chip fabrication is validation and testing. In biotech this is equivalent to identifying cancerous cells and then removing them. Curing cancer is a necessary step to be able to validate and bin functional biomachines. Unless we have a cure for cancer I don't believe that biomachines are technically possible.
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  39.  @Urgelt  I believe the tech when it delivers the cure for cancer. Test and validations that is the minimum requirement for mass production. No one will use a smartphone that randomly gives you aids.
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  40.  @PainterVierax  HBM is just expensive all those TSV cost a lot. AMD is now trying to use SRAM chiplet to amplify effective bandwidth. SRAM for gaming HBM for AI.
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  41. The problem is not only efficiency but also noise. A tiny amount of energy can flip the state of the transistor so any circuit using the material will be extremely unstable and will not provide reliable and correct computation.
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  42. High NA have 16nm resolution. Double patterning gets you to 8 nm resolutionand quadruple patterning gives you 4nm. I think they will stay with EUV and just enlarge the reticle. Fabs will have to use multi patterning to get to smaller resolution.
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  43. They are not going to catch up. The total investment on improving the semiconductor industry is enormous. Russia would bankrupt trying to match it. They also don't have the expert workforce needed to undertake the task. Even the US could not spend their way to bring the latest process node in the country. TSMC will build a 5nm fab in the US but they are already at 3nm. The semiconductor industry is a technology train that never stops and always full speed ahead. One misstep and you will be left behind with no hope of catching up. This is what is happening to Intel.
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  44.  @Flankymanga  Gold don't make EUV scanner. You need expert engineers 15 years and unlimited budget to make a prototype.
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  45. No. EUV is 0.33NA and High NA EUV is 0.55NA.
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  46.  @disadadi8958  If the sine wave is 10khz then a PWM of 1Mhz is more than enough. SiC could handle that.
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  47.  @disadadi8958  It is not that simple you can over built things. For example using 200A device for 100A application. Yes GaN has a better efficiency curve but you can brute force efficiency by climbing down the efficiency curve to match whatever is your efficiency target.
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  48.  @disadadi8958  People optimize for dollars per effective range. Currently GaN is not competitive in price even SiC is a pricier option with low cost EV using only power MOSFET. Tesla has invested a lot on SiC production to gain economies of scale. Someone needs to do the same on GaN to drive down the cost. SiC has the production advantage and the difference in efficiency does not out weigh the difference in cost.
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  49.  @disadadi8958  When industrial technology gains scale it becomes really hard to displace. Just look at Silicon. It becomes a humongous industry that any competitor becomes relegated to niche application. Even in EV application Silicon is still being utilized for power electronics even if GaN and SiC are so much better.
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  50.  @bubblebobble9654  It is a repeat. Does Intel have more engineering resources now compared to when they are leading? If you can prove that current Intel engineers are more competent than before then maybe this time it is different.
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